1. Technical Field
The invention disclosed broadly relates to transistor circuits and more particularly relates to improvements in fiber-optic receivers.
2. Background Art
Fiber optic communications systems typically employ a photo diode or other optical detector located at an output of a fiber-optic link for converting the optical energy of a light pulse transmitted in the fiber to an electrical pulse suitable for electrical processing. Since fiber-optic communications are conducted at high data rates on the order of 10.sup.8 binary bits per second, it is imperative that the timing and synchronization at the receiving end of the fiber-optic link be very precise. Typically, it is necessary to decode the input optical signal to regenerate the bit timing, and therefore data edge skew must be minimized at the receiver.
In high speed serial data reconstruction at the receiving end of the fiber-optic link, receiver circuits in the prior art typically employed two comparators to convert the detected edges of the electrical signal into digital output data. One comparator is used with a positive threshold to detect positive edges and the other comparator is used with a negative threshold to detect negative edges. The prior art has experienced significant problems even with careful comparator matching, the difference in propagation delay between the two comparators can distort the true edge location of the reconstructed data waveform. In addition, prior art receiver circuits experienced problems related to reference voltage drift, the elimination or minimization of extraneous noise, and a problem of requiring large quantities of circuitry to minimize noise, detect incoming signals, and perform the necessary comparison with a minimum of skew so that reliable output data waveforms could be obtained.